ISL34321

• 16-bit RGB transport over single differential pair 16位RGB比单差分对传输
• 6MHz to 45MHz pixel clock rates为6MHz到45MHz的像素时钟频率
• Bi-directional auxiliary data transport without extra bandwidth and over the same differential pair双向辅助数据传输，无需额外的带宽和在同一差分对
• Hot plugging with automatic resynchronization every HSYNC.热插拔与自动同步所有的HSYNC。
• I ² C Bus Mastering to the remote side of the link with a controller on either the serializer or deserializer I ^{2 C}总线控制器掌握到远程端与链接，无论是串行器或解串器
• Selectable clock edge for parallel data output可选择时钟边沿并行数据输出
• DC balanced with industry standard 8b/10b line code allows AC-coupling直流行业标准的8B/10B线路编码平衡允许交流耦合
  • Provides immunity against ground shifts对地面移动提供免疫力
• 16 programmable settings each for transmitter amplitude boost and pre-emphasis and receiver equalization allow for longer cable lengths and higher data rates 16个可编程设置发射机振幅增加和预加重和接收均衡每个允许更长的电缆长度和更高的数据速率
• Same device for serializer and deserializer simplifies inventory串行器及解串器为相同的设备简化库存

The ISL34321 is a serializer/deserializer of LVCMOS parallel video data.该ISL34321是一个序列化/视频数据的并行LVCMOS的解串器。 The video data presented to the serializer on the parallel LVCMOS bus is serialized into a high-speed differential signal.视频介绍上的并行LVCMOS总线串行数据序列化为一个高速差分信号。 This differential signal is converted back to parallel video at the remote end by the deserializer.这种差分信号转换回平行的解串器在远程终端视频。 It also transports auxiliary data bidirectionally over the same link during the video vertical retrace interval.它还在传输过程中的双向视频垂直折回的时间间隔相同的链接辅助数据。

I ² C bus mastering allows the placement of external slave devices on the remote side of the link. I ^{2 C}总线主控允许远端连结的安置对外部设备的奴隶。 An I ² C controller can be place on either side of the link allowing bidirectional I ² C communication through the link to the external devices on the other side.一个I ² C控制器可以放在一边的其他任何一方对外部设备的链接，通过链接，允许双向沟通的I ^{2 C。} Both chips can be fully configured from a single controller or independently by local controllers.这两款芯片可完全配置的单控制器或本地控制器独立。